sampling hold circuit
基本解释
- 取樣保持電路
英汉例句
- Sampling rate and holding accuracy are two most concerned targets in designing the sample-and-hold circuit.
採樣速度和保持精度，是採樣保持電路設計制作者最爲關注的兩項指標。 - The signal accepted by ultrasonic probe passes disposing circuit, magnifying, sieving its waves, passing demodulation, sampling and holding system and then comes into A/D conversion.
信號由接收探頭傳到信號処理電路，經過放大、濾波、檢波、採樣保持進入A／D轉換器。 - The circuit is divided into full bridge module, charge sense amplifier module, correlated double sampling and holding module, closed-loop feedback module, low-pass filter and time controlling module.
檢測電路分爲全橋平衡模塊、電荷放大器模塊、信號放大模塊、相關雙採樣模塊、採樣保持模塊、閉環反餽模塊、低通濾波模塊和數字時序控制模塊。