digital coherent demodulation

基本解释

In digital phase modulation system, there always exists carrier phase-ambiguity in the process of coherent demodulation.
在数字相位调制系统的相干解调过程中，普遍存在着载波相位模糊问题。
Based on the function of the synchronization status monitor of Q-1900, a new method for correcting output data status of all digital coherent QPSK demodulation is presented.
结合Q-1900维特比译码器同步状态监测功能，提出了一种校正QPSK全数字相干解调的八种数据输出状态的新方法。
The Digital Phase Lock Loop(DPLL)is the core of the coherent demodulation.
数字锁相环路（DPLL）是数字相干解调技术的核心。